Arithmetic Circuits for Energy-Precision Tradeoffs in Mobile Graphics Processing Units

In mobile devices, limiting the Graphics Processing Unit’s (GPU’s) energy usage is of great importance to extending battery life. This work shows that significant energy savings can be obtained by reducing the precision of graphics computations, yet maintaining acceptable quality of the final rendered image. In particular, we focus on a portion of a typical graphics processor pipeline—the vertex transformation stage—and evaluate the tradeoff between energy efficiency and image fidelity. We first develop circuit-level designs of arithmetic components whose precision can be varied dynamically with fine-grained power gating techniques. Spice simulation is used to characterize each component’s energy consumption, based on which a system-level energy model for the entire vertex stage is developed. We then use this energy model in conjunction with a graphics hardware simulator to determine the energy savings for real workloads. Results show that significant energy savings (>60%) can be obtained by lowering the arithmetic precision of this stage without causing any noticeable artifacts in the final image. Furthermore, our approach allows for even greater energy savings for only a modest loss of image quality. Thus, this work finds that the tradeoff between energy efficiency and result quality in a GPU can be exploited to significant benefit with the presented circuit designs.